forked from xuos/xiuos
289 lines
7.9 KiB
Plaintext
289 lines
7.9 KiB
Plaintext
/*
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** ###################################################################
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** Processors: MIMXRT1052CVJ5B
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** MIMXRT1052CVL5B
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** MIMXRT1052DVJ6B
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** MIMXRT1052DVL6B
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**
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** Compiler: GNU C Compiler
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** Reference manual: IMXRT1050RM Rev.1, 03/2018
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** Version: rev. 1.0, 2018-09-21
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** Build: b180921
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**
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** Abstract:
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** Linker file for the GNU C Compiler
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**
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** Copyright 2016 Freescale Semiconductor, Inc.
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** Copyright 2016-2018 NXP
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** All rights reserved.
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**
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** SPDX-License-Identifier: BSD-3-Clause
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** ###################################################################
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*/
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/**
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* @file link.lds
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* @brief ok1052-c board Linker script
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-05-28
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*/
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/*************************************************
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File name: link.lds
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Description: ok1052-c board Linker script
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Others: take MIMXRT1052xxxxx_flexspi_nor.ld for references
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History:
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1. Date: 2021-05-28
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Author: AIIT XUOS Lab
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Modification:
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1. add shell cmd table and g_service_table
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*************************************************/
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/* Entry Point */
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ENTRY(Reset_Handler)
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STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
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/* Specify the memory areas- */
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MEMORY
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{
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/* define flash 32MB */
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m_boot_data (RX) : ORIGIN = 0x30000000, LENGTH = 0x00001000
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m_image_vertor_table (RX) : ORIGIN = 0x30001000, LENGTH = 0x00001000
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m_interrupts (RX) : ORIGIN = 0x30002000, LENGTH = 0x00001000
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m_text (RX) : ORIGIN = 0x30002400, LENGTH = 0x01FFDC00
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/* define itcm 256KB */
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sram_itcm_cm7 (rwx) : ORIGIN = 0x0, LENGTH = 0x40000 /* 256K bytes (alias RAM2) */
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/* define dtcm 256KB */
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sram_dtcm_cm7 (rwx) : ORIGIN = 0x20000000, LENGTH = 0x40000 /* 256K bytes (alias RAM) */
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/* define ocram1 512KB */
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sram_oc1 (rwx) : ORIGIN = 0x20240000, LENGTH = 0x80000 /* 512K bytes (alias RAM3) */
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/* define ocram2 256KB */
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sram_oc2 (rwx) : ORIGIN = 0x202c0000, LENGTH = 0x40000 /* 256K bytes (alias RAM4) */
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/* define nocache regin 256KB */
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NCACHE_REGION (rwx) : ORIGIN = 0x20300000, LENGTH = 0x40000 /* 256K bytes (alias RAM5) */
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/* define ocram ecc1 and ecc2 64KB */
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sram_oc_ecc1 (rwx) : ORIGIN = 0x20340000, LENGTH = 0x10000 /* 64K bytes (alias RAM6) */
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sram_oc_ecc2 (rwx) : ORIGIN = 0x20350000, LENGTH = 0x10000 /* 64K bytes (alias RAM7) */
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/* define extern sdram 32MB*/
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board_sdram (rwx) : ORIGIN = 0x80000000, LENGTH = 0x2000000 /* 32M bytes (alias RAM8) */
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}
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/* Define output sections */
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SECTIONS
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{
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.boot_data :
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{
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KEEP(*(.boot_hdr.conf))
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} > m_boot_data
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.image_vertor_table :
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{
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. = ALIGN(4);
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KEEP(*(.boot_hdr.ivt))
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KEEP(*(.boot_hdr.boot_data))
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KEEP(*(.boot_hdr.dcd_data))
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. = ALIGN(4);
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} > m_image_vertor_table
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/* The startup code goes first into internal RAM */
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.interrupts :
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{
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__VECTOR_TABLE = .;
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} > m_interrupts
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__VECTOR_RAM = __VECTOR_TABLE;
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__RAM_VECTOR_TABLE_SIZE_BYTES = 0x0;
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/* The program code and other data goes into internal RAM */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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/* section information for shell */
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. = ALIGN(4);
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_shell_command_start = .;
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KEEP (*(shellCommand))
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_shell_command_end = .;
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. = ALIGN(4);
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__isrtbl_idx_start = .;
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KEEP(*(.isrtbl.idx))
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__isrtbl_start = .;
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KEEP(*(.isrtbl))
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__isrtbl_end = .;
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. = ALIGN(4);
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PROVIDE(g_service_table_start = ABSOLUTE(.));
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KEEP(*(.g_service_table))
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PROVIDE(g_service_table_end = ABSOLUTE(.));
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} > m_text
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > m_text
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.ARM :
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{
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} > m_text
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.ctors :
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{
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__CTOR_LIST__ = .;
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/* gcc uses crtbegin.o to find the start of
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the constructors, so we make sure it is
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first. Because this is a wildcard, it
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doesn't matter if the user does not
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actually link against crtbegin.o; the
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linker won't look for a file to match a
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wildcard. The wildcard also means that it
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doesn't matter which directory crtbegin.o
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is in. */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*crtbegin?.o(.ctors))
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/* We don't want to include the .ctor section from
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from the crtend.o file until after the sorted ctors.
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The .ctor section from the crtend file contains the
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end of ctors marker and it must be last */
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KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__CTOR_END__ = .;
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} > m_text
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.dtors :
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{
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__DTOR_LIST__ = .;
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KEEP (*crtbegin.o(.dtors))
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KEEP (*crtbegin?.o(.dtors))
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KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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__DTOR_END__ = .;
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} > m_text
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} > m_text
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} > m_text
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} > m_text
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__etext = .; /* define a global symbol at end of code */
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__DATA_ROM = .; /* Symbol is used by startup for data initialization */
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.data : AT(__DATA_ROM)
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{
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. = ALIGN(4);
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__DATA_RAM = .;
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__data_start__ = .; /* create a global symbol at data start */
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*(m_usb_dma_init_data)
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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KEEP(*(.jcr*))
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. = ALIGN(4);
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__data_end__ = .; /* define a global symbol at data end */
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} > sram_dtcm_cm7
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__NDATA_ROM = __DATA_ROM + (__data_end__ - __data_start__);
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.ncache.init : AT(__NDATA_ROM)
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{
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__noncachedata_start__ = .; /* create a global symbol at ncache data start */
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__NCACHE_REGION_START = .;
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*(NonCacheable.init)
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. = ALIGN(4);
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__noncachedata_init_end__ = .; /* create a global symbol at initialized ncache data end */
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} > NCACHE_REGION
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. = __noncachedata_init_end__;
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.ncache :
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{
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*(NonCacheable)
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. = ALIGN(8192);
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__noncachedata_end__ = .; /* define a global symbol at ncache data end */
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__NCACHE_REGION_END = .;
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} > NCACHE_REGION
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__DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
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text_end = ORIGIN(m_text) + LENGTH(m_text);
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ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
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/* Uninitialized data section */
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss section */
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. = ALIGN(4);
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__START_BSS = .;
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__bss_start__ = .;
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*(m_usb_dma_noninit_data)
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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__END_BSS = .;
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} > sram_dtcm_cm7
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.stack :
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{
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. = ALIGN(8);
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stack_start = .;
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. += STACK_SIZE;
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stack_end = .;
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__StackTop = .;
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heap_start = .;
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} > sram_oc1
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PROVIDE(heap_end = ORIGIN(sram_oc1) + LENGTH(sram_oc2) + LENGTH(NCACHE_REGION));
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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